Zichen Fan

About Me

Hi! I am now a 5th-year Ph.D. candidate student at Department of Electrical & Computer Engineering, University of Michigan. I am working in Michigan Intergrated Circuits Laboratory (MICL) since Aug. 2019, under the supervision of Professor Dennis Sylvester and Professor David Blaauw. I also have in-depth cooperation with Professor Hun-Seok Kim.

I was a research assistant in Integrated Vision, Intelligent Perception (IVIP) Lab, Tsinghua University, advised by Professor Fei Qiao and Professor Qi Wei since 2016. In Summer 2018, I was a visiting student and research assistant at Computational Evolutionary Intelligence (CEI) Lab, advised by Professor Yiran Chen and Professor Hai (Helen) Li.

My research interests span from circuit design, architecture design to hardware-friendly algorithm design, including hardware-algorithm co-design, low-power VLSI system design, model compression, in-memory computing and deep learning.

Education

Aug. 2019 - Present, Department of Electrical & Computer Engineering, University of Michigan, Ann Arbor, MI

Ph.D. candidate.

Aug. 2015 - Jul. 2019, Department of Electronic Engineering, Tsinghua University, Beijing, China

Bachelor of Engineering.

Academic Experience

Aug. 2019 - Present, Michigan Integrated Circuits Laboratory (MICL), University of Michigan, Ann Arbor, MI

Graduate Student Research Assistant.

Sept. 2016 - Jul. 2019, Lab of Nanoscale Integrated Circuits and Systems (NICS), Tsinghua University, Beijing, China

Undergraduate Research Assistant.

Jun. 2018 - Sep. 2018, Computational Evolutionary Intelligence (CEI) Lab, Duke University, Durham, NC

Visiting Student and Research Assistant.

Industrial Experience

May. 2024 - Aug. 2024, Nvidia Research, Nvidia, Santa Clara, CA

Research Intern.

May. 2023 - Aug. 2023, Qualcomm Research Center, Qualcomm, San Diego, CA

Research Intern.

Publications and Manuscripts

Conference Paper

• P. Abillama, Q. Zhang, Z. Fan, Y. Chen, H. An, D. Blaauw, D. Sylvester, H.S. Kim, A 22nm 9.51 TOPS/W Neural Engine with 2MB MRAM Leveraging Sparse-Orthogonal Walsh-Hadamard Transform Computations and Dynamic Power Gatings, IEEE European Solid-State Circuits Conference (ESSCIRC), 2024 . [comming soon]

• R. Rothe, J. Lee, Z. Fan, L.Y. Chen, D. Seo, Y. Lee, D. Sylvester, D. Blaauw, A µW Output Power, >100V, Single-Capacitor Switched DC-DC Up/Down Converter, IEEE Symposium on VLSI Technology and Circuits (VLSI-symp), 2024. [comming soon]

• Z. Fan, Q. Zhang, P. Abillama, S. Shoouri, C. Lee, D. Blaauw, H.S. Kim , D. Sylvester, TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing, International Symposium on Computer Architecture (ISCA), 2023. [pdf]

• S. Shoouri, M. Yang, Z. Fan, H.S. Kim, Efficient Computation Sharing for Multi-Task Visual Scene Understanding, International Conference on Computer Vision (ICCV), 2023. [pdf]

• P. Abillama, Z. Fan, Y. Chen, H. An, Q. Zhang, S. Choi, D. Blaauw, D. Sylvester, H.S. Kim, SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2023 (Best Paper Award). [pdf]

• Y. Wang, S. Young, D. Komma, J. Lim, Z. Feng, Z. Fan, C.W. Tseng, H.S. Kim, D. Blaauw, Global Localization of Energy-Constrained Miniature RF Emitters using Low Earth Orbit Satellites, 21st ACM Conference on Embedded Networked Sensor Systems (SenSys), 2023 . [pdf]

• C.W. Tseng, Z. Feng, Z. Fan, H. An, Y. Wang, H.S. Kim, D. Blaauw, A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers, IEEE Symposium on VLSI Technology and Circuits (VLSI-symp), 2023. [pdf]

• J.H. Seol, H. Yang, R. Rothe, Z. Fan, Q. Zhang, H.S. Kim, D. Blaauw, D. Sylvester, A 1.5uW End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog Frontend, IEEE International Solid-State Circuits Conference (ISSCC), 2023. [pdf]

• H. An, Y. Chen, Z. Fan, Q. Zhang, P. Abillama, H.S. Kim, D. Blaauw, D. Sylvester, An 8.09 TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees, IEEE International Solid-State Circuits Conference (ISSCC), 2023. [pdf]

• Z. Fan, H. An, Q. Zhang, B. Xu, L. Xu, C.W. Tseng, Y. Peng, A. Cao, B. Liu, C. Lee, Z. Wang, F. Liu, G. Wang, S. Jiang, H.S. Kim, D. Blaauw, D. Sylvester, Audio and Image Cross-Modal Intelligence via a10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating, IEEE Symposium on VLSI Technology and Circuits (VLSI-symp), 2022. [pdf]

• Q. Zhang, H. An, Z. Fan, Z. Wang, Z. Li, G. Wang, H.S. Kim, D. Blaauw, D. Sylvester, A 22nm 3.5 TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence, IEEE Symposium on VLSI Technology and Circuits (VLSI-symp), 2022. [pdf]

• Z. Fan, Z. Li, B. Li, Y. Chen, H. Li, RED: A ReRAM-based Deconvolution Accelerator, Design, Automation and Test in Europe (DATE), 2019. [pdf]

• Z. Liu, Z. Fan, Q. Wei, X. Wu, F. Qiao, P. Jin, X. Liu, H. Yang, Design of Switched-Current Based Low-Power PIM Vision System for IoT Applications, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019. [pdf]

Journal Paper

• Z. Fan, Q. Zhang, H. An, B. Xu, L. Xu, C.W. Tseng, Y. Peng, A. Bejarano-Carbo, P. Abillama, A. Cao, B. Liu, C. Lee, Z. Wang, H.S. Kim, D. Blaauw, D. Sylvester, AIMMI: Audio and Image Multi-Modal Intelligence via a Low Power SoC with 2M-Byte On-chip MRAM for IoT Devices, IEEE Journal of Solid-State Circuits (JSSC), 2024. [coming soon]

• Q. Zhang, Z. Fan, H. An, Z. Wang, Z. Li, G. Wang, P. Abillama, H.S. Kim, D. Blaauw, D. Sylvester, RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM, IEEE Journal of Solid-State Circuits (JSSC), 2024. [pdf]

• C.W. Tseng, Z. Feng, Z. Fan, H. An, Y. Wang, H.S. Kim, D. Blaauw,, A Low-Power Highly Reconfigurable Analog FIR Filter With 11-bit Charge-Domain DAC for Narrowband Receivers, IEEE Solid-State Circuits Letters (SSC-L), 2024. [pdf]

• H. Yang, J.H. Seol, R. Rothe, Z. Fan, Q. Zhang, H.S. Kim, D. Blaauw, D. Sylvester, A 1.5uW Fully-Integrated Keyword Spotting SoC in 28nm CMOS with Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping, IEEE Journal of Solid-State Circuits (JSSC), 2023. [pdf]

• Z. Li, B. Li, Z. Fan, H. Li, RED: A ReRAM-based efficient accelerator for deconvolutional computation, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), 2020. [pdf]

• Z. Fan, Z. Liu, Z. Qu, F. Qiao, Q. Wei, X. Liu, Y. Sun, S. Xu, H. Yang, ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm, IEEE Transactions on Very Lage Scale Integation Systems (T-VLSI), 2019. [pdf]

• S. Alyamkin, et al, Low-Power Computer Vision: Status, Challenges, Opportunities, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (T-ESTCS), 2019. [pdf]

Honors and Awards

• International Conference on Application-specific Systems, Architectures and Processors (ASAP) Best Paper Award   2023
• Qualcomm Innovation Fellowship (QIF) Finalist   2023
• International Symposium on Computer Architecture (ISCA) Student Travel Grant   2023
• Rackham Conference Travel Grant   2022, 2023
• 3rd place in Low-Power Image Recognition Challenge (LPIRC 2018), Track2   2018
• 2nd Prize in Tsinghua Excellent Student Research Training (SRT) Project   2018
• 3rd Prize in 35th Challenge cup of Tsinghua University   2018
• Meritorious Winner in Mathematical Contest in Modeling, COMAP   2017
• 1st Prize for the 32rd National Undergraduate Physics Olympic   2016
• 2nd Prize in Tsinghua Maker Challenge, Tsinghua University   2016
• Scholarship for Scientific and Technological Innovation   2016, 2017, 2018
• Scholarship for Academic Excellence   2015, 2016